1. Field of the Invention
The present invention relates to circuit boards with built-in electronic components that have electronic components built in, such as active components such as semiconductor devices or the like and passive components such as capacitors or the like, and methods for manufacturing the same.
2. Related Background Art
Along with a call for higher performance and miniaturization in electronic equipment in recent years, there has been an even greater call for higher density and higher performance in semiconductor devices. Moreover, circuit boards that can achieve miniaturization and high density also are desired. For this reason, circuit boards with built-in electronic components have been proposed (for example, see JP 2001-332866A) that have at least one electronic component such as an, active component or a passive component embedded internally and are provided with an inner via through which a wiring pattern and the electronic components are connected electrically.
FIGS. 23 and 24 are cross-sectional views showing configuration examples of conventional circuit boards with built-in electronic components. A circuit board 1001 with built-in electronic components shown in the drawings is an built-in semiconductor device type circuit board. The circuit board 1001 with built-in electronic components shown in FIG. 23 has a multi-layer wiring structure with a first wiring pattern 1002 formed on one main surface (a first main surface) of one side of an insulating layer 1005, and a second wiring pattern 1003 formed on another main surface (a second main surface) of another side of the insulating layer 1005. The insulating layer 1005 is formed with a composite material in which an inorganic filler and a thermosetting resin are mixed. The first wiring pattern 1002 and the second wiring pattern 1003, which are positioned on different surfaces of the insulating layer 1005 from each other, are electrically connected by an inner via 1004 made of an electroconductive resin composition. Semiconductor chips 1006 are embedded inside the insulating layer 1005, and external connection terminals 1007 of the semiconductor chips 1006 are connected electrically to the first wiring pattern 1002 via connection members 1008 (for example, see JP 2001-332866A).
However, there are structural impediments to increasing packaging density in the above-described conventional example and it is difficult to achieve high density. The following is a description of this problem.
In the circuit board 1001 with built-in electronic components shown in FIG. 23, the external connection terminals 1007 of the semiconductor chips 1006 are formed on a surface facing the first wiring pattern 1002, and therefore can be directly connected to the first wiring pattern 1002 using the connection members 1008. In contrast to this, a direct connection is not possible when it is necessary to electrically connect the external connection terminals 1007 to the second wiring pattern 1003, which is opposed to a surface on which the external connection terminals 1007 of the semiconductor chips 1006 are not provided (for example, when connecting an external connection terminal 1007a to a wiring 1003a contained in the second wiring pattern 1003), and therefore a connection must be made via the first wiring pattern 1002 and the inner via 1004. In this manner, because it is necessary to use other wiring (the first wiring pattern 1002) and the inner via 1004 when connecting the external connection terminal 1007 and the second wiring pattern 1003, the containment rate of wiring is reduced, thus making it difficult to achieve higher density.
Furthermore, as shown in FIG. 24, with semiconductor chips 1006 in which external connection terminals are provided on a surface of one side only, the pitch of the external connection terminals is restricted to the pitch of the wiring when connecting external connection terminals 1007b through 1007f to the wirings 1002b through 1002f contained in the wiring pattern 1002. For this reason, regardless of the ability to further miniaturize the semiconductor chips 1006, the size of the semiconductor chips 1006 is restricted due to the above-described reason, so that there is also the problem of miniaturization being inhibited.